Theoretical and Natural Science

- The Open Access Proceedings Series for Conferences


Theoretical and Natural Science

Vol. 28, 26 December 2023


Open Access | Article

Source of IC power consumption and low power design

Jiaqi Zhang * 1 , Lingxuan Dong 2 , Shuo Yuan 3 , Junhao Gu 4
1 Tianjin Polytechnic University
2 Xi'an Jiaotong University
3 Hangzhou Foreign Language School
4 Ulink College of Shanghai

* Author to whom correspondence should be addressed.

Theoretical and Natural Science, Vol. 28, 116-122
Published 26 December 2023. © 2023 The Author(s). Published by EWA Publishing
This article is an open access article distributed under the terms and conditions of the Creative Commons Attribution (CC BY) license, which permits unrestricted use, distribution, and reproduction in any medium, provided the original work is properly cited.
Citation Jiaqi Zhang, Lingxuan Dong, Shuo Yuan, Junhao Gu. Source of IC power consumption and low power design. TNS (2023) Vol. 28: 116-122. DOI: 10.54254/2753-8818/28/20230411.

Abstract

In these years, with the continuous development of 14nm and 7nm chip processes and the increasing popularity of computers, cell phones, and smart homes, the growing market of electronic products and ultra-fine research for the reliability of the chip requirements gradually increased. The method of reducing power consumption in the new context of new technology is called the chip field die-cut concern. This paper mainly summarizes two aspects of power consumption sources and methods to reduce power consumption, to provide a reference basis for future research directions: First, the major sources of power consumption are static power consumption and dynamic power consumption. The primary sources of static power consumption are sub-threshold leakage and gate leakage current. This paper also mentions some other leakage currents, such as reverse bias PN junction current and induced leakage current, which can be more carefully considered when exploring methods to reduce power consumption. A more comprehensive consideration when exploring ways to reduce power consumption. Dynamic power consumption is mainly divided into Switching power and Internal power and short-circuit power. Then we summarize the existing methods which can reduce power consumption: Clock gating (including Clock gating without a latch and Clock gating with a latch), Dynamic voltage and frequency scaling, multi-supply and multi-voltage technology, Power gating and multi-threshold voltage. These methods are from a proprietary perspective to reduce power consumption.

Keywords

Static and Dynamic Power Consumption, Clocking Gating, Power Gating

References

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5. Xu Z; low power design and research based on UPF[D]; 2020, pp. 7-19

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Data Availability

The datasets used and/or analyzed during the current study will be available from the authors upon reasonable request.

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Volume Title
Proceedings of the 2023 International Conference on Mathematical Physics and Computational Simulation
ISBN (Print)
978-1-83558-261-9
ISBN (Online)
978-1-83558-262-6
Published Date
26 December 2023
Series
Theoretical and Natural Science
ISSN (Print)
2753-8818
ISSN (Online)
2753-8826
DOI
10.54254/2753-8818/28/20230411
Copyright
26 December 2023
Open Access
This article is an open access article distributed under the terms and conditions of the Creative Commons Attribution (CC BY) license, which permits unrestricted use, distribution, and reproduction in any medium, provided the original work is properly cited

Copyright © 2023 EWA Publishing. Unless Otherwise Stated