Theoretical and Natural Science

- The Open Access Proceedings Series for Conferences


Theoretical and Natural Science

Vol. 26, 20 December 2023


Open Access | Article

Exploring the implementation and applications of 7-segment clocks on FPGA

Jingyan Zhang 1 , Xiaoyu Zheng * 2
1 Beijing University of Technology
2 Harbin Institute of Technology

* Author to whom correspondence should be addressed.

Theoretical and Natural Science, Vol. 26, 37-43
Published 20 December 2023. © 2023 The Author(s). Published by EWA Publishing
This article is an open access article distributed under the terms and conditions of the Creative Commons Attribution (CC BY) license, which permits unrestricted use, distribution, and reproduction in any medium, provided the original work is properly cited.
Citation Jingyan Zhang, Xiaoyu Zheng. Exploring the implementation and applications of 7-segment clocks on FPGA. TNS (2023) Vol. 26: 37-43. DOI: 10.54254/2753-8818/26/20241009.

Abstract

The core objective of this undertaking revolves around digital circuits and Field-programmable gate arrays (FPGAs), focusing on the design and implementation of a digital clock capable of showcasing real-time hours, minutes, and seconds. To ensure accurate time tracking, the project ingeniously employs a MOD 60 counter, dedicated specifically for counting both minutes and seconds, while a separate MOD 24 counter is harnessed to track hours. These counters serve as the backbone of the clock’s accurate time-keeping capability. To translate this raw digital data into an easily interpretable format for users, the project incorporates a seven-segment display, ensuring that the time can be read intuitively at a glance. The entire architecture and logic of the digital clock is artfully crafted using Verilog HDL, a versatile programming language revered for its aptness in hardware description and simulation. To bring the clock to life and rigorously test its functionality, the Quartus platform is utilized. This renowned platform not only facilitates the efficient translation of the Verilog HDL code into tangible digital circuitry but also offers a robust environment for simulation, ensuring the clock operates flawlessly in real-world scenarios.

Keywords

Digital circuit, FPGA, Seven-segment display, Digital clock, Verilog HDL

References

1. Borodzhieva, A. N., Stoev, I. I., & Mutkov, V. A. (2019, May). FPGA Implementation of Code Converters of Decimal Digits from BCD Codes to Seven-Segment Display Code. In 2019 X National Conference with International Participation (ELECTRONICA) (pp. 1-4). IEEE.

2. Kumar, M., Jayalaxmi, A., & Malemnganbi, W. (2022). Design and Implementation of Secured Car Parking System using FPGA. International Journal of Applied Engineering Research, 17 (3), 180-188.

3. Seetharaman, R., Ramajayam, M., Kamalakannan, K., Vignesh, M., Saran, R. L., Anandan, K., & Mole, S. S. (2022, March). FPGA Based Morse Code Communicator for Visual and Speech Impaired People using Basys-3. In 2022 International Conference on Electronics and Renewable Systems (ICEARS) (pp. 1889-1894). IEEE.

4. Qu, L., Wang, C., Sun, W., Lin, Y., & Zhang, H. (2020, September). Design and simulation of three-level SVPWM based on FPGA. In IOP Conference Series: Earth and Environmental Science (Vol. 565, No. 1, p. 012013). IOP Publishing.

5. Šušteršič, T., & Peulić, A. (2019). Implementation of face recognition algorithm on field programmable gate array (FPGA). Journal of Circuits, Systems and Computers, 28 (08), 1950129.

6. Zhu, X., Xu, H., Zhao, Z., & others. (2021). An Environmental Intrusion Detection Technology Based on WiFi. Wireless Personal Communications, 119 (2), 1425-1436.

7. Tsai, M. F., Tseng, C. S., & Cheng, P. J. (2021). Implementation of an FPGA-based current control and SVPWM ASIC with asymmetric five-segment switching scheme for AC motor drives. Energies, 14(5), 1462.

8. Sirisha, B., & Kumar, P. S. (2019, October). SVPWM based generalized switching schemes for seven level DCMLI including over modulation operation-FPGA implementation. In TENCON 2019-2019 IEEE Region 10 Conference (TENCON) (pp. 2135-2142). IEEE.

9. Minev, P., Kukenska, V., Varbov, I., & Dinev, M. (2022, September). Systems for Remote Access to FPGA Development Boards. In 2022 XXXI International Scientific Conference Electronics (ET) (pp. 1-6). IEEE.

10. Seetharaman, R., Shivananth, I., Ganeshakumar, M., Anitha, D., Anandan, K., & Gayathri, S. (2022, November). Development of Crowd Management System using FPGA Circuits. In 2022 International Conference on Augmented Intelligence and Sustainable Systems (ICAISS) (pp. 1-4). IEEE.

Data Availability

The datasets used and/or analyzed during the current study will be available from the authors upon reasonable request.

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Volume Title
Proceedings of the 3rd International Conference on Computing Innovation and Applied Physics
ISBN (Print)
978-1-83558-235-0
ISBN (Online)
978-1-83558-236-7
Published Date
20 December 2023
Series
Theoretical and Natural Science
ISSN (Print)
2753-8818
ISSN (Online)
2753-8826
DOI
10.54254/2753-8818/26/20241009
Copyright
20 December 2023
Open Access
This article is an open access article distributed under the terms and conditions of the Creative Commons Attribution (CC BY) license, which permits unrestricted use, distribution, and reproduction in any medium, provided the original work is properly cited

Copyright © 2023 EWA Publishing. Unless Otherwise Stated